synopsysrtl

Design Compiler® RTL synthesis solution enables users to meet today's design challenges with concurrent optimization of timing, area, power and test.

Design Compiler NXT 采用了全新的综合创新技术，可以显著缩短运营时间，提高结果质量，并且与IC Compiler II 有着极其密切的RC 和时序的关联性。

RTL Architect's new Predictive Engine (PE) is derived from Synopsys' implementation environment and enables rapid multi- dimensional analysis and optimization ...

The Synopsys RTL Architect™ product represents the industry's first physically aware RTL analysis, optimization, and signoff system. Download Datasheet ...

Synopsys RTL Architect is a predictive RTL design solution that provides early predictions of the impact RTL changes will have on implementability, power, ...

Synopsys RTL Architect uses a fast, multi-dimensional implementation prediction engine that enables RTL designers to predict the power, performance, area, ...

2020年3月26日 — (台北訊) 新思科技近日宣布RTL Architect™即刻上市，該創新產品可有效加速RTL設計收斂(design closure) ，促進整體晶片設計流程的向左推移(shift-left)。

2020年9月20日 — 本课程【数字IC后端设计ICC2完全实践】主要以实际操作的形式用Synopsys后端工具带大家从零开始完成一个后端设计小模块，包含后端实现、时序检查和物理验证 ...